Handout Index
Floating Gate Tutorial
Telluride Neuromorphic Engineering Workshop 2003
Ania Mitros
ania@klab.caltech.edu
This folder contains:
- Ania's handwritten notes. The basic lectures on physics of
transistors and floating gate transistors will be based on this,
but the notes probably go into more detail than I will have time
to cover in the tutorial.
- Copies of some (maybe even all) slides used in my talks.
- Layout, cross-section, and band diagram of a pFET synapse (a basic
floating gate device).
- Notes from Telluride 1998. Sometimes it helps to see material
presented in two different ways so this should complement my notes.
Things have changed a bit since 1998; these notes focus on nFETs
whereas today we use primarily pFETs as floating gate devices. The
operation of the two is analogous.
- Adaptive CMOS: From biological inspiration to systems-on-a-chip
Chris Diorio, David Hsu, and Miguel Figueroa
Proceedings of the IEEE, vol. 90, no. 3, pp. 345-357, 2002.
Examples of recent work with floating gate transistors.
- Modeling CMOS tunneling currents through ultrathin gate oxide due to
conduction- and valence-band electron and hole tunneling
Wen-Chin Lee; Chenming Hu;
Electron Devices, IEEE Transactions on , Volume: 48 Issue: 7 ,
July 2001 Page(s): 1366 -1373
Detailed model of tunneling.
- Ultra-thin, 1.0-3.0 nm, gate oxides for high performance sub-100
nm technology
Sorsch, T.; Timp, W.; Baumann, F.H.; Bogart, K.H.A.; Boone, T.;
Donnelly, V.M.; Green, M.; Evans-Lutterodt, K.; Kim, C.Y.; Moccio, S.;
Rosamilia, J.; Sapjeta, J.; Silvermann, P.; Weir, B.; Timp, G.;
VLSI Technology, 1998. Digest of Technical Papers. 1998 Symposium on ,
9-11 June 1998, Page(s): 222 -223
Fig. 4 contains measurements of tunneling currents for several
oxide thicknesses as a function of gate voltage. Useful for getting
a sense of leakage as oxides scale in modern processes.
- A complementary pair of four-terminal silicon synapses
Chris Diorio, Paul Hasler, Bradley A. Minch, and Carver Mead
Analog Integrated Circuits and Signal Processing, vol. 13, no. 1/2,
pp. 153-166, 1997.
Contains nice descriptions of how tunneling and injection work,
and clear explanations of related equations, and equations for a
learning rule.
- Adaptive circuits using pFET floating-gate devices
Hasler, P.; Minch, B.A.; Diorio, C.;
Advanced Research in VLSI, 1999. Proceedings. 20th Anniversary
Conference on , 21-24 March 1999, Page(s): 215 -229
Example applications of floating gate transistors.
- A simulation model for floating-gate MOS synapse transistors
Kambiz Rahimi, Chris Diorio, Cecilia Hernandez, and M. Dean Brockhausen
Proceedings of the 2002 IEEE International Symposium on Circuits and
Systems Phoeniz, AZ, vol. 2, pp. 532-535, 2002.
Empirical equations for tunneling and injection.
Note that more papers on floating gate circuits can be found at:
http://www.cs.washington.edu/research/diorio/Papers/